Summary: Genetic Algorithms (GA) were introduced as a method of solving difficult optimization problems by means of simulated evolution. A major drawback of GA is their slowness when emulated by S/W on conventional computers. The objective of this work is to present an H/W implementation of GA in FPGA. The fitness evaluation task is problem dependent, however proves a major difficulty in H/W implementation. Another difficulty comes from that designs can only be used for the individual problem their fitness function represents. Therefore, in this work, the genetic operators are implemented in H/W, while the fitness evaluation module is treated separately. It can be implemented as S/W module. This allows a mixed hardware/software approach to address both generality and acceleration. Also it could be simplified and implemented as reconfigurable H/W module. You can use dedicated chip for this purpose. If you want to implement the whole algorithm in one chip, recent partially configured FPGA chips allow this approach. The Fitness Evaluation module is targeted a Robot Motion Path Planning problem.
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(*) Prof. Dr. Imbaby I. Mahmoud is a Prof. of Computer and System Engineering at the Engineering Dept., NRC, Atomic Energy Authority, Cairo, Egypt. He was appointed as demonstrator in the same Dept. in 1983.
He earned his Dr. Eng. Degree from School of Science and Engineering, Waseda University, Tokyo, Japan in March 1994 in the field of VLSI Design.
He worked at the KFKI, Hungarian Academy of Sciences, Budapest, Hungary in CPLD design for reactor control under IAEA fellowship from May to August 1998. Also he served as technical officer of IAEA TC Project EGY/043 entitled Environmental Monitoring Instruments from 1999-2001.
During the period Oct.2001-Jun2007 he was teaching programming, computer logic, computer networks and graduation projects at Dammam College of Technology, Dammam, Saudi Arabia. In the same period he was supervising M. Sc. and Ph. D. candidates in Egypt in the field of design and implementation of different algorithms in FPGA.
- Member of IEICE (The Institute of Electronics,
Information and Communication Engineers, EIC) -
1990:1994 - Japan,
- IEEE (Computer society affiliate) -1994 - USA,
- Engineers syndicate of Egypt - Egypt, and
- Egyptian Society of Nuclear Sciences and
Applications (ESNSA) - Egypt.

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